Debug port answered, no core behind it

The chip answered but no Cortex-M core was found behind its debug port. This is what a chip held in reset, or one whose core domain is unpowered, looks like from here.

CORTEX_M_NO_CORE_FOUND

Symptoms

  • The chip answered — this is not the silent case — but the error says no cores were discovered.
  • The same board works from a vendor tool that connects under reset.
  • It happens on a custom board and never on the dev-board equivalent of the same part.

Likely causes

  • The chip is held in reset. The debug port stays alive across reset on Cortex-M, so the port answers while the core behind it does not.
  • The core’s power domain is off. On parts with separate debug and core domains, the DP responds before the core is powered up.
  • The link is good enough to read the port but not to walk the ROM table — a marginal clock or a long cable can stop exactly here.
  • A part where the core is released by a bootloader or a security controller that has not run yet.

How to fix it

  1. Release reset

    Check NRST is not held low by a supervisor, a stuck button or a second debugger. This is the most common reason a live port has nothing behind it.

  2. Give the board its own supply

    Power the board from its normal supply rather than the probe alone, so the core domain comes up as designed.

  3. Lower the debug clock

    If the port reads but discovery does not finish, drop the SWD clock (4 MHz → 500 kHz) and try again. Short the wiring at the same time.

  4. Try connecting under reset

    This catches the case where something in the firmware takes the core away right after boot.

    pyocd commander -M under-reset

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